Conventionally, as technology for adjusting the characteristics of a semiconductor integrated circuit (IC) (trimming technology), there are for example, technologies using fuses made of polysilicon and technologies using Zener-zap diodes.
The trimming technology using fuses can form the fuses simultaneously with the formation of the polysilicon layer frequently used for gate electrodes or resistors of the transistors in the IC and can adjust the characteristics by the simple configuration by just inserting the fuses in current paths to be shut off, so the technology is widely used. The fuses are generally melt by irradiation of laser beams or by supplying current to the fuses.
FIG. 9 and FIG. 10 show a trimming circuit for melting a fuse by supplying a current taking as an example a case of adjusting the resistance value. FIG. 9 is a circuit diagram of the configuration of the trimming circuit.
The serial resistors R of the circuit shown in FIG. 9 are comprised of a reference resistor R0 (resistance value: r0) and trimming resistors R1 and R2 (resistance values: r1, r2). These resistors R0 to R2 are connected in series. Fuses F1 and F2 made of polysilicon are connected in parallel to the trimming resistors R1 and R2. An electrode pad PD1 is connected to a node between the reference resistor R0 and the trimming resistor R1, an electrode pad PD2 is connected to a node between the trimming resistors R1 and R2, and an electrode pad PD3 is connected to another side of the trimming resistor R2.
FIG. 10A and FIG. 10B are a plan view and a sectional view of the fuse F1. A semiconductor substrate 100 is formed with an insulating film 101. The insulating film 101 is formed with the fuse F1 comprised of polysilicon. A polysilicon layer 102 forming the fuse F1 is patterned to have a shape comprised of two pads 102Ba and 102Bb and a fuse body 102A connecting them. Further, the fuse body 102A is configured by a fuse line portion 102Aa and connection portion 102Ab formed so as to become broader further to the outside from the two ends of the fuse line 102Aa for the purpose of dispersing the electric field concentration at the corners.
The polysilicon layer 102 is formed with an inter-layer insulating film 103 comprised of, for example, silicon oxide or silicon nitride. The inter-layer insulating film 103 has an aperture (opening) at substantially the centers of the pads 102Ba and 102Bb at the two ends of the polysilicon layer 102. Pad openings (apertures) 103A and 103B are formed by this. Electrode layers 104A and 104B are formed with patterns larger than the pad openings 103A and 103B of the inter-layer insulating film 103 by one order of size. The electrode layers 104A and 104B are extended to the peripheral edge of the IC chip as electric wirings (interconnects) and connected to the electrode pads PD1 and PD2 shown in FIG. 9.
In the trimming circuit having such a configuration, for example, when checking the characteristics of the IC at the final stage of the wafer process, the fuse F1 or F2 is melted when required in order to make a predetermined characteristic approach the ideal value, in accordance with the results of measurement of the characteristics of the IC. Specifically, when the value of the resistor R may be r0 as it is, the fuse is not melted, but when the value of the resistor R is to be made larger than r0, the fuse F1 or F2 is melted. When melting the fuse F1, needles are attached to the electrode pads PD1 and PD2 and a predetermined current is supplied. As a result, the current density increases in the fuse body 102A of the polysilicon layer 102, the polysilicon layer 102 is melted at this portion, and the fuse F1 becomes cut-off. As a result, the value of the resistor R changes to (r0+r1). In the same way, when melting the fuse F2 by supplying current from the electrode pads PD2 and PD3, the value of the resistor R changes to (r0+r2). When melted both of the fuses F1 and F2, the value of the resistor R changes to (r0+r1+r2).
In such a conventional fuse, however, the melted location of the fuse varies, and the fuse is sometimes melted at a point Z1 shown in FIG. 10A. In this case, the electrode layer dissolves into the fuse due to heat generated and connects the melted locations of the polysilicon, and therefore it suffers from the disadvantage that the fuse is not sufficiently melted.